Sathe, Chaitanya : rechercher sur Z-Library

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1

Computational Investigation of DNA Detection Using Graphene Nanopores

Sathe, Chaitanya, Zou, Xueqing, Leburton, Jean-Pierre, Schulten, Klaus

Journal:

Année:

2011

Langue:

english

Fichier:

PDF, 1.06 MB

english, 2011

2

Electronic detection of dsDNA transition from helical to zipper conformation using graphene nanopores

Sathe, Chaitanya, Girdhar, Anuj, Leburton, Jean-Pierre, Schulten, Klaus

Journal:

Année:

2014

Langue:

english

Fichier:

PDF, 962 KB

english, 2014

3

[IEEE 2010 11th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2010.03.22-2010.03.24)] 2010 11th International Symposium on Quality Electronic Design (ISQED) - Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework

Sachid, Angada B., Thakker, Rajesh A., Sathe, Chaitanya, Baghini, Maryam Shojaei, Sharma, Dinesh K., Rao, V. Ramgopal, Patil, Mahesh B.

Année:

2010

Langue:

english

Fichier:

PDF, 19.78 MB

english, 2010

4

Detection and Quantification of Methylation in DNA using Solid-State Nanopores

Shim, Jiwook, Humphreys, Gwendolyn I., Venkatesan, Bala Murali, Munz, Jan Marie, Zou, Xueqing, Sathe, Chaitanya, Schulten, Klaus, Kosari, Farhad, Nardulli, Ann M., Vasmatzis, George, Bashir, Rashid

Journal:

Scientific Reports

Année:

2013

Langue:

english

Fichier:

PDF, 919 KB

english, 2013

5

Computational Investigation of Graphene Nano Pore DNA Detection

Sathe, Chaitanya, Zou, Xueqing, Leburton, Jean-Pierre, Schulten, Klaus

Journal:

Biophysical Journal

Année:

2012

Langue:

english

Fichier:

PDF, 34 KB

english, 2012

6

[IEEE 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Bangalore, India (2007.01.6-2007.01.10)] 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Modeling and Analysis of Noise Margin in SET Logic

Sathe, Chaitanya, Mahapatra, Santanu

Année:

2007

Langue:

english

Fichier:

PDF, 928 KB

english, 2007

7

[IEEE 2009 Asia and South Pacific Design Automation Conference (ASP-DAC) - Yokohama, Japan (2009.01.19-2009.01.22)] 2009 Asia and South Pacific Design Automation Conference - Automated design and optimization of circuits in emerging technologies

Thakker, Rajesh A., Sathe, Chaitanya, Sachid, Angada B., Baghini, Maryam Shojaei, Rao, V. Ramgopal, Patil, Mahesh B.

Année:

2009

Langue:

english

Fichier:

PDF, 203 KB

english, 2009

8

Gate-modulated graphene quantum point contact device for DNA sensing

Girdhar, Anuj, Sathe, Chaitanya, Schulten, Klaus, Leburton, Jean-Pierre

Journal:

Journal of Computational Electronics

Année:

2014

Langue:

english

Fichier:

PDF, 1.63 MB

english, 2014

9

Tunable graphene quantum point contact transistor for DNA detection and characterization

Girdhar, Anuj, Sathe, Chaitanya, Schulten, Klaus, Leburton, Jean-Pierre

Journal:

Année:

2015

Langue:

english

Fichier:

PDF, 1.89 MB

english, 2015